The disclosed technology relates to a pixel electrode layer structure of a thin film transistor liquid crystal display (TFT-LCD), a method for manufacturing the same and a mask therefor.
Thin Film Transistor-Liquid Crystal Displays (TFT-LCDs) have dominated the current flat panel display market because of extraordinary characteristics such as thin profile and lightweight, low power consumption, no radiation and the like. However, liquid crystal displays have a drawback that its viewing angle is relatively small. For this reason, wide viewing angle technologies have been developed. Fringe Field Switch (FFS) technology, as one of various wide viewing angle technologies, generates a fringe field between transparent electrodes such that liquid crystal molecules between the transparent electrodes and over the transparent electrodes may rotate in a plane parallel to a substrate or in a plane inclined with respect to the substrate, thereby improving the viewing angle while increasing the transmittance of the liquid crystal layer.
Generally, an FFS-type TFT-LCD liquid crystal panel may comprise a glass substrate; a gate electrode, a gate line and a common electrode faulted on the glass substrate, the common electrode comprising a common electrode line and a transparent electrode; a gate insulating layer formed on the gate electrode, the gate line and the common electrode, covering the entire glass substrate; an active layer formed on the gate insulating layer and positioned over the gate electrode; a source/drain electrode layer formed on the active layer and forming a data line substantially perpendicular to the gate line and the source and drain electrodes; a passivation layer formed on the source and drain electrodes and covering the entire glass substrate, the passivation layer having a through-hole formed therein; and a pixel electrode formed on the passivation layer and electrically connected to the source/drain electrode through the through-hole.
During manufacture of the conventional FFS-type TFT-LCD liquid crystal panel, a mask for the pixel electrode layer structure is divided into two parts, i.e., a display region mask pattern and a peripheral region mask pattern. As shown in FIG. 1, typically, the display region mask pattern 1 comprises an array of pixel electrode mask patterns 11, and the peripheral region mask pattern 2 comprises a driving circuitry mask pattern 21, a electrical performance testing mask pattern 22, a shadow plate registration mark 23, an interlayer registration mark 24, a substrate-to-mask registration mark 25 and the like, each of which has a relative small area.
In a developing step for manufacture of the pixel electrode layer structure, area of the photoresist layer remaining for the peripheral circuitry mask pattern 2 is relatively small and thus most of the photoresist layer reacts with the developer, consuming a large amount of developer. In contrast, the photoresist layer remains in a relatively large area in the display region, consuming a less amount of developer. In this case, there is a difference in concentration of the developer between periphery and central portion of the panel, resulting in an ununiform distribution of the developer concentration across the entire panel.
In manufacturing of the pixel electrode layer structure in the FFS-type TFT-LCD array substrate, as a develop inspection critical dimension (DICD) is generally small (about 4.0 μm), DICD may be affected by the concentration of the developer and thus change considerably.
As a result, a plurality of twill-like mura 3 may be generated in the display region when the pixel electrode layer structure is formed during manufacture of the FFS-type TFT-LCD array substrate, as shown in FIG. 2. The twill-like mura is resulted from deteriorative uniformity of line width of the pixel electrode layer structure throughout the panel. When the panel operates, the twill-like mura may induce twill-like bright lines, causing a quality-deteriorated or even abnormal display and thereby decreasing the yield.